1. Field of the Invention
The present invention generally relates to a ring oscillator type voltage-controlled oscillator (VCO). More specifically, the present invention is directed to a ring oscillator type VCO capable of controlling a phase of an oscillated output signal based upon a control voltage without varying a duty ratio thereof.
2. Description of the Related Art
As a voltage-controlled oscillator (abbreviated as "VCO"), a ring oscillator type VCO as represented in FIG. 1A and FIG. 1B is known. In such a ring oscillator type VCO, odd numbered stages of inverter circuits are cascade-connected to each other, thereby constituting a positive feedback loop, and a control voltage Vc is applied to the inverter circuits at the respective stages. It should be noted that a capacitor indicates a load capacitance.
The Japanese Laid-open patent application No.2-53304 opened in 1990 discloses such a conventional ring oscillator type VCO constructed of a bipolar IC. To the contrary, another conventional ring oscillator type VCO constructed of a MOSIC is generally illustrated in FIG. 1B, and arranged such that each stage of the inverter circuit is constructed of a single inverter made of the load transistor Q.sub.L and the driver transistor Q.sub.D, and then the control voltage Vc is applied to the load transistor Q.sub.L.
FIG. 2 is a waveform chart for representing an input signal "Vin" and an output signal "Vout" of one inverter.
In the above-explained conventional ring oscillator type VCO, shown in FIGS. 1A and 1B, when the input signal Vin has fallen from a "high" level to a "low" level, the charging operation to the load capacitance of the next stage is commenced by the load transistor Q.sub.L. In connection with this charging operation, the level of the output voltage Vout is increased with an inclination (namely, an increasing speed) corresponding to the control voltage Vc, and gradually reaches the voltage level of the power source. Then, this source voltage level of the output signal Vout is maintained for a moment. Thereafter, this input signal Vin is raised from the "low" level to the "high" level. Accordingly, the source voltage level (namely, the high level) of the output signal Vout is inverted to the low level. It should be understood that although a certain delay is actually produced between the rising (from LOW to HIGH) operation of this input signal Vin and the falling operation (from HIGH to LOW) of the output signal Vout, this delay amount is assumed to be zero for the sake of convenience. Then, while the level of the input signal Vin is high, the level of the output signal Vout is maintained at OV. When the input signal Vin has fallen from the high level to the low level, the load capacitance is charged by the load transistor Q.sub.L, so that the output signal Vout is increased at a certain increasing speed.
Then, the increasing (rising) speed of the output signal Vout from the level of OV to the voltage level of the power source can be varied by controlling the control voltage Vc. As a consequence, the phase and the oscillating frequency can be changed by leading and delaying the timings, in response to the control voltage Vc, at which the output voltage Vout from the inverter circuit rises from OV and intersects the threshold voltage of the inverter circuit of a subsequent stage.
On the other hand, in accordance with the conventional ring oscillator type VCO as shown in FIG. 1B, only the delay amount of the rising edge of the output signal waveform within a single stage of inverter circuit can be controlled based on the control voltage Vc, but the delay amount of the falling edge thereof cannot be controlled.
Then, in the conventional ring oscillator type VCO represented in FIG. 1B, a p-channel MOS transistor is controlled as the load transistor (a variable current source) by the control voltage Vc. Alternatively, an n-channel MOS transistor may be controlled as this load transistor based on the control voltage Vc. In this alternative example, the delay amount of the falling edge of the output signal waveform may be controlled. However, conversely, the delay amount of the rising edge cannot be controlled.
In any of the conventional inverter circuits, only a delay amount of either the rising edge, or the falling edge of the output signal waveform can be controlled.
As a consequence, the edge delay control for the output signal waveform can be done only for every second stage, so that the duty ratio of the oscillated output signal waveform would be varied by the control voltage Vc.
Thus, it is very inconvenient when such a conventional ring oscillator type VCO is utilized as a digital type phase comparator of a PLL circuit, since the delay amounts of both the rising edge and the falling edge of each stage of the inverter circuit would be directly reflected into the resolution of this phase comparator. As a result, no high-precision PLL control operation can be achieved. There is also another problem in that the conventional ring oscillator type VCO cannot be utilized in a usage which requires a secondary distortion (duty ratio) characteristic of the oscillator output.